What the Study Found
- Moving a silicon carbide transistor’s gate below its channel, rather than above it, cut the threshold-voltage design error from 2.5 volts to under 0.1 volts at 673 kelvin (400C).
- Isolating the transistor with a p-n junction double-well structure, instead of relying on a semi-insulating substrate, suppressed high-temperature leakage current to about 3×10^-5 mA/mm at 873 kelvin (600C).
- That leakage current’s activation energy of 1.28 eV came close to the 1.5 to 1.6 eV theoretical limit set by silicon carbide’s own bandgap, indicating the design has nearly exhausted engineerable leakage.
- The redesigned transistor kept a stable on-off current ratio above 1,000 at 600C, over five orders of magnitude better than the earlier substrate-based device at 673 kelvin.
For more than 20 years, silicon carbide has carried a reputation it couldn’t quite live up to. Engineers talked about it as the material that would finally let electronics survive inside a jet engine, down a geothermal borehole, or on the surface of Venus, where the average temperature hovers near 464 degrees Celsius. But turning that promise into a working chip kept stalling at the same two problems: transistors that would not switch on and off where they were supposed to, and current that leaked through the material itself once things got hot. A team at Kyoto University says it has now solved both problems in a single design.
“We believe the lack of development is because the research community has been trying to apply silicon-era thinking to a fundamentally different material,” says Mitsuaki Kaneko, an associate professor at Kyoto University and first author of the study published in APL Electronic Devices. Standard silicon chip designs, he and his colleagues argue, don’t automatically transfer to silicon carbide’s very different crystal structure and defect behavior.
A Gate Moved to the Basement
The device at the center of the study is a junction field-effect transistor, or JFET, a type of switch that uses a buried region of oppositely doped material rather than a fragile oxide layer to control current flow. That oxide-free design is one reason JFETs have long been considered a strong candidate for high-temperature electronics, since oxide layers in ordinary transistors tend to degrade as temperatures climb. Kaneko’s team had already built silicon carbide JFETs with a conventional top-gate layout, in which the control gate sits above the current-carrying channel. Those earlier devices worked up to 673 kelvin (400C), but their actual switching voltage drifted far from its intended design value, which ruled out the tight, predictable behavior that a logic circuit needs.
The drift traced back to how the devices were made. Both the channel and the gate are carved into the silicon carbide by firing dopant ions into the crystal, and those ions do not travel in a straight, uniform path. Along certain crystal directions the ions can slip unusually deep in a phenomenon called channeling, so the doping profile that comes out of manufacturing does not match the one on the drawing board. In the team’s earlier top-gate devices, that stray channeling tail sat inside the channel itself, throwing off the switching voltage by more than 2 volts at room temperature and getting worse, not better, at 673 kelvin.
“Our goal is to open a new path forward with complementary JFETs designed to harness the intrinsic properties of SiC itself,” Kaneko says. His team’s fix was structural rather than chemical: flip the gate underneath the channel instead of stacking it on top. In that arrangement, the same channeling effect that had corrupted the channel now works in the researchers’ favor, because the heavily doped bottom gate absorbs and compensates the errant dopant tail before it can distort the channel above it.
Borrowing From Established Manufacturing
Rather than inventing an exotic new fabrication process, the team deliberately built the bottom-gate structure using industry-standard ion implantation and annealing steps already used elsewhere in silicon carbide manufacturing. Secondary ion mass spectrometry measurements, which physically profile how dopants actually settled inside the finished chip, confirmed the theory: in the bottom-gate devices, the measured phosphorus and aluminum profiles lined up almost exactly with the profiles the researchers had designed on paper. In the older top-gate version, the measured profile diverged sharply from the design in the deeper region below the channel.
That agreement showed up directly in performance. The threshold voltage of the redesigned transistor, measured against its intended design value, was off by less than 0.1 volts at room temperature and stayed within that same 0.1-volt margin at 673 kelvin. The old top-gate version, tested for comparison, missed its design target by more than 2.5 volts at that same temperature. Fixing the gate’s geometry, in other words, did more to stabilize the switching voltage than 20 years of incremental materials work on silicon carbide had achieved.
The Substrate Itself Was Leaking
Fixing the voltage problem revealed another weakness. Even with the new bottom-gate design, the transistor began to leak more current as the chip got hotter. At 673 kelvin, or about 400C, the leakage rose to about 1 × 10^-3 milliamps per millimeter. At that point, the transistor could no longer act as a reliable on-off switch.
The problem was not the transistor itself. It was the silicon carbide underneath it. That material is designed to block electrical current by trapping charged particles. But heat can release those trapped charges. As the temperature rose, the supposedly insulating layer began to conduct electricity, creating an unwanted path between the transistor’s source and drain.
The researchers solved this problem by changing the way they isolated the transistor. Instead of depending on the insulating substrate, they built a second version on a more conventional silicon carbide layer. They then surrounded the transistor with rings of p-type and n-type material. These rings form electrical barriers that keep current from leaking between the source and drain.
Tests showed that the new approach worked for a very different reason than the old one. In the original device, the way leakage increased with temperature pointed to heat releasing trapped charges in the substrate. In the new design, the results came much closer to the limit set by the basic physics of silicon carbide itself.
That’s important. It means most of the remaining leakage is no longer caused by a flaw that engineers can simply design away. Instead, it’s approaching the minimum leakage the material itself allows.
As a result, the new transistor kept leakage to about 3 × 10^-5 milliamps per millimeter even at 873 kelvin, or 600C. That was more than 10 times lower than the older design managed at a temperature 200 degrees cooler. The transistor also remained a strong switch: its current when “on” stayed more than 1,000 times higher than when “off” all the way to 600C. That was more than 100,000 times better than the older design at 400C.
What Still Has to Happen First
The devices tested so far are single transistors on a lab bench, not the complementary logic circuits that a real sensor or processor would need, and the paper’s authors built them for normally-on operation, meaning further design work is still required to reach the normally-off behavior that low-power circuits depend on. Getting from an individual transistor at 600C to a functioning integrated circuit is the step that has stalled other high-temperature electronics efforts before, including NASA’s own silicon carbide circuits, which have logged over a year of continuous operation at 500C but have not yet been demonstrated at 600C in the field.
The 464C mean surface temperature of Venus sits well within the range this transistor was tested at, and past landers have been limited to a few hours of operation there because conventional electronics fail almost immediately in that heat, a constraint NASA’s Glenn Research Center has spent over a decade trying to engineer around. Kaneko’s team says its next steps are to build more complex circuits from the new bottom-gate design, scale the process up toward wafer-level production, and confirm that a full circuit package, not just an isolated transistor, holds together in the same punishing heat.
Reference
Kaneko, M., Shibata, S., & Kimoto, T. (2026). Over 600 °C operation of ion-implantation-based SiC bottom-gate JFETs. APL Electronic Devices, 2(3), 036113. https://doi.org/10.1063/5.0346734
- Study type: Experimental device fabrication and electrical characterization.
- Sample: Individual bottom-gate p- and n-channel JFETs (100 micrometer channel width, 20 micrometer channel length), fabricated both on a semi-insulating 4H-SiC substrate and on an n-type 4H-SiC epitaxial layer with a double-well isolation structure.
- Models: Not applicable; single-device electrical testing, not simulation or animal/cell models.
- Manipulation: Gate position (bottom vs. top) and substrate isolation scheme (semi-insulating substrate vs. p-n junction double-well) were varied across device versions.
- Duration: Electrical measurements taken from room temperature up to 873 kelvin (600C); no long-duration burn-in reported.
- Funding and conflicts: Funded by a research grant from The Canon Foundation. The authors report no conflicts of interest.
- Data availability: Data available from the corresponding author upon reasonable request.
- Main limitation: Devices were tested as individual normally-on transistors rather than as complementary logic circuits, and long-term durability at 600C over extended time was not evaluated.
FAQ
What is a JFET and why does it matter for high-temperature electronics?
A junction field-effect transistor (JFET) controls current using a buried doped region rather than an oxide layer, which avoids the oxide degradation that limits ordinary silicon transistors at high heat.
What did moving the gate below the channel actually fix?
It let the heavily doped bottom gate absorb the stray ion-channeling tail that had been distorting the channel’s doping profile, cutting the threshold-voltage design error from over 2.5 volts to under 0.1 volts at 673 kelvin.
Why did the earlier version of the transistor leak current at high temperature?
It sat on a semi-insulating substrate whose deep trap sites release stored charge as temperature rises, turning the substrate into an unintended current path between source and drain.
How close is the new leakage current to the physical limit for silicon carbide?
The measured activation energy of 1.28 electron volts is close to the 1.5 to 1.6 electron volt ceiling set by silicon carbide’s bandgap, meaning little further leakage reduction is possible through design alone.
What still needs to happen before this could be used in a real device?
The researchers need to build complementary logic circuits rather than single transistors, achieve normally-off operation, and scale the fabrication process to wafer level while confirming robustness in extreme environments.
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